The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 08, 2008
Filed:
Jan. 30, 2004
Takeshi Aimoto, Sagamihara, JP;
Nobuhito Matsuyama, Hadano, JP;
Kazuo Sugai, Hadano, JP;
Hiroki Yano, Hadano, JP;
Yoshihiko Sakata, Hadano, JP;
Shinichi Akahane, Hachioji, JP;
Yuichi Ishikawa, Machida, JP;
Takeshi Aimoto, Sagamihara, JP;
Nobuhito Matsuyama, Hadano, JP;
Kazuo Sugai, Hadano, JP;
Hiroki Yano, Hadano, JP;
Yoshihiko Sakata, Hadano, JP;
Shinichi Akahane, Hachioji, JP;
Yuichi Ishikawa, Machida, JP;
Hitachi, Ltd., Tokyo, JP;
Abstract
In one embodiment, a bandwidth monitoring device comprises a packet receiving circuit configured to receive packets; a counter configured to count a total packet length by adding up inputted packet lengths including a packet length of a next input packet and subtracting outputted packet lengths to produce a counted value; a timer configured to time a packet receiving time; a memory configured to store a number of packet receiving times and a number of counted values counted by the counter which correspond to the packet receiving times, respectively; a counter rate-of-change calculating portion configured to calculate a change rate by a first counted value corresponding to an oldest packet receiving time stored in the memory representing an oldest time at which a packet was received and a second counted value corresponding to a latest packet receiving time stored in the memory representing a latest time at which a packet was received; and a determining portion configured to decide whether the next input packet will be discarded based on a probability computed by the change rate and the counted value counted by the counter when the packet receiving circuit receives the next input packet.