The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 01, 2008
Filed:
Nov. 14, 2003
Anthony Correale, Jr., Raleigh, NC (US);
James N. Dieffenderfer, Apex, NC (US);
Robert L. Goldiez, Apex, NC (US);
Thomas P. Speier, Holly Springs, NC (US);
William R. Reohr, Ridgefield, CT (US);
Anthony Correale, Jr., Raleigh, NC (US);
James N. Dieffenderfer, Apex, NC (US);
Robert L. Goldiez, Apex, NC (US);
Thomas P. Speier, Holly Springs, NC (US);
William R. Reohr, Ridgefield, CT (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A system and method for accessing a data cache having at least two ways for storing data at the same addresses. A first and second tag memory store first and second sets of tags identifying data stored in each of the ways. A translation device determines from a system address a tag identifying one of the ways. A first comparator compares tags in the address with a tag stored in the first tag memory. A second comparator compares a tag in the address with a tag stored in the second tag memory. A clock signal supplies clock signals to one or both of the ways in response to an access mode signal. The system can be operated so that either both ways of the associative data cache are clocked, in a high speed access mode, or it can apply clock signals to only one of the ways selected by an output from the first and second comparators in a power efficient mode of operation.