The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 01, 2008

Filed:

May. 20, 2003
Applicants:

DO Yeon Kim, Daejeon, KR;

Sang Min Lee, Daejeon, KR;

Chang Ho Choi, Daejeon, KR;

Sung Soo Kang, Daejeon, KR;

Hae Won Jung, Daejeon, KR;

Hyeong Ho Lee, Daejeon, KR;

Inventors:

Do Yeon Kim, Daejeon, KR;

Sang Min Lee, Daejeon, KR;

Chang Ho Choi, Daejeon, KR;

Sung Soo Kang, Daejeon, KR;

Hae Won Jung, Daejeon, KR;

Hyeong Ho Lee, Daejeon, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04J 3/16 (2006.01);
U.S. Cl.
CPC ...
Abstract

Disclosed herein is a 10-gigabit Ethernet line interface apparatus and method of controlling the same. The apparatus has N network processors, a frame multiplexing and demultiplexing block, a 10-gigabit extender sublayer processing block, a 10-gigabit Ethernet physical layer processing block, a 10-gigabit physical layer control logic, a line interface control logic, and a line processor. The N network processors are connected to the switch fabric unit. The frame multiplexing and demultiplexing block provides GMII and XGMII between the N network processors and a 10-gigabit extender sublayer processing block. The present invention can improve transmission speed and packet processing performance of a physical layer to a 10 Gbps level while maintaining basic frame standards of a 1-gigabit Ethernet switch apparatus.


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