The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 01, 2008
Filed:
Dec. 24, 2004
Adeel Ahmad, Lucknow, IN;
Rajat Chauhan, Dehradun, IN;
Adeel Ahmad, Lucknow, IN;
Rajat Chauhan, Dehradun, IN;
STMicroelectronics PVT. Ltd., Uttar Pradesh, IN;
Abstract
The embodiments of the present invention introduced and taught herein are directed to a whole-chip ESD protection arrangement that is independent of relative supply rail voltage and supply sequencing, thereby enabling ESD conduction path during ESD event and isolating the ESD conduction path during the power up and power down modes of the chip. An embodiment of the present invention uses the bi-directional R-C clamp with transistorized arrangements between powered rails and avoids the drawback of using uni-directional Clamps or diode array for clamping that consumes large silicon area, requires power sequencing and is prone to noise coupling between power rails.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile