The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 01, 2008

Filed:

Oct. 03, 2006
Applicants:

Sanjay K. Wadhwa, Saharanpur, IN;

Deeya Muhury, Ranchi, IN;

Pawan K. Tiwari, Noida, IN;

Inventors:

Sanjay K. Wadhwa, Saharanpur, IN;

Deeya Muhury, Ranchi, IN;

Pawan K. Tiwari, Noida, IN;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03B 19/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A digital clock frequency multiplier () for increasing an input frequency of an input clock signal includes a generator () that receives the input clock signal and a high frequency digital signal. The generator () divides a count (N) of a number of cycles of the high frequency digital signal in one period of the input clock signal by a predetermined multiplication factor (MF) for generating an output clock signal. The output clock signal has a predetermined output frequency.


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