The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 7394241 B1

PDF
Full Text
Expired
Date of Patent:
Jul. 01, 2008

Filed:

Apr. 26, 2006
Applicant:

Yu-wen Tsai, Hsin-Chu, TW;

Inventor:

Yu-Wen Tsai, Hsin-Chu, TW;

Assignee:

Faraday Technology Corp., Hsin-Chu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/28 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method for testing power switches using a logic gate tree, the method includes providing a logic gate tree electrically connected to a plurality of power switches, each output node of the plurality of power switches being electrically connected to a corresponding input node of a logic gate of the logic gate tree; applying a pattern of control signals to the plurality of power switches for controlling on-off states of the plurality of power switches; and determining whether an output voltage signal of an output node of the logic gate tree matches a predetermined value corresponding to the pattern of control signals.


Find Patent Forward Citations

Tsai, Yu-Wen. (2008). Method and apparatus for testing power switches using a logic gate tree (U.S. Patent No. 7394241). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7394241

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Loading…