The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 01, 2008

Filed:

Jan. 11, 2007
Applicants:

In-soo Jung, Gyeonggi-do, KR;

Deok-hyung Lee, Gyeonggi-do, KR;

Si-young Choi, Gyeonggi-do, KR;

Byeong-chan Lee, Gyeonggi-do, KR;

Yong-hoon Son, Gyeonggi-do, KR;

Inventors:

In-Soo Jung, Gyeonggi-do, KR;

Deok-Hyung Lee, Gyeonggi-do, KR;

Si-Young Choi, Gyeonggi-do, KR;

Byeong-Chan Lee, Gyeonggi-do, KR;

Yong-Hoon Son, Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/34 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method of forming a fin field effect transistor on a semiconductor substrate includes forming an active region in the substrate, forming an epitaxial layer on the active region, and removing a portion of the epitaxial layer to form a vertical fin on the active region. The fin has a width that is narrower than a width of the active region. Removing a portion of the epitaxial layer may include oxidizing a surface of the epitaxial layer and then removing the oxidized surface of the epitaxial layer to decrease the width of the fin. The epitaxial layer may be doped in situ before removing a portion of the epitaxial layer. The method further includes forming a conductive layer on a top surface and on sidewalls of the fin. Related transistors are also discussed.


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