The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 01, 2008
Filed:
Jun. 05, 2006
Shrane-ning Jenq, Hsinchu, TW;
Hung-wei LI, Hsinchu, TW;
Min-sheng Chu, Tao Yuan Shien, TW;
Chi-chao Wan, Hsinchu, TW;
Yung-yun Wang, Hsinchu, TW;
Po-tsun Liu, Hsinchu, TW;
Shrane-Ning Jenq, Hsinchu, TW;
Hung-Wei Li, Hsinchu, TW;
Min-Sheng Chu, Tao Yuan Shien, TW;
Chi-Chao Wan, Hsinchu, TW;
Yung-Yun Wang, Hsinchu, TW;
Po-Tsun Liu, Hsinchu, TW;
Quanta Display Inc., Tao Yuan Shien, TW;
Abstract
A method for manufacturing copper wires on a substrate for a flat panel display device is disclosed. The method comprises following steps: providing a substrate; forming a seed layer on the surface; forming a patterned photoresist on the surface of the seed layer to expose a part of the seed layer; and plating a copper layer on the exposed part of the seed layer. As the copper layer is plated, an electrolyte solution comprises a sulfur-containing compound is used. The angle between the surface of the copper layer and the contact surface of the seed layer is greater than 0 degree and less than 90 degree. Through the method illustrated above, the film step-coverage in the following process can be improved, the generated voids in device can be reduced, the manufacturing steps can be simplified, and the complicated etching process can be avoided.