The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 24, 2008

Filed:

Jun. 15, 2004
Applicants:

Jeffrey M. Wolfe, Bradenton, FL (US);

Jason L. Copenhaver, Sarasota, FL (US);

Jeremy Ramos, Clearwater, FL (US);

Inventors:

Jeffrey M. Wolfe, Bradenton, FL (US);

Jason L. Copenhaver, Sarasota, FL (US);

Jeremy Ramos, Clearwater, FL (US);

Assignee:

Honeywell International Inc., Morristown, NJ (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 11/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

An electronic module is provided. The module includes a first logic device having at least two processors and a first comparator and a second logic device having at least one processor and a second comparator. Each of the at least two processors are coupled to each of the first and second comparators. The first and second comparators operate as a distributed comparator system. Each comparator independently identifies faults in the processors.


Find Patent Forward Citations

Wolfe, Jeffrey. (2008). Redundant processing architecture for single fault tolerance (U.S. Patent No. 7392426). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7392426

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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