The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 24, 2008

Filed:

Sep. 16, 2005
Applicants:

Pradip Bose, Yorktown Heights, NY (US);

Alper Buyuktosunoglu, White Plains, NY (US);

Richard J. Eickemeyer, Rochester, MN (US);

Lee E. Eisen, Round Rock, TX (US);

Philip G. Emma, Danbury, CT (US);

John B. Griswell, Austin, TX (US);

Zhigang HU, Ossining, NY (US);

Hung Q. Le, Austin, TX (US);

Douglas R. Logan, Austin, TX (US);

Balaram Sinharoy, Poughkeepsie, NY (US);

Inventors:

Pradip Bose, Yorktown Heights, NY (US);

Alper Buyuktosunoglu, White Plains, NY (US);

Richard J. Eickemeyer, Rochester, MN (US);

Lee E. Eisen, Round Rock, TX (US);

Philip G. Emma, Danbury, CT (US);

John B. Griswell, Austin, TX (US);

Zhigang Hu, Ossining, NY (US);

Hung Q. Le, Austin, TX (US);

Douglas R. Logan, Austin, TX (US);

Balaram Sinharoy, Poughkeepsie, NY (US);

Assignee:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 9/30 (2006.01); G06F 9/40 (2006.01); G06F 15/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A multithreaded processor, fetch control for a multithreaded processor and a method of fetching in the multithreaded processor. Processor event and use (EU) signs are monitored for downstream pipeline conditions indicating pipeline execution thread states. Instruction cache fetches are skipped for any thread that is incapable of receiving fetched cache contents, e.g., because the thread is full or stalled. Also, consecutive fetches may be selected for the same thread, e.g., on a branch mis-predict. Thus, the processor avoids wasting power on unnecessary or place keeper fetches.


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