The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 24, 2008

Filed:

Sep. 27, 2007
Applicants:

Chul-woo Park, Gyeonggi-do, KR;

Sung-hoon Kim, Gyeonggi-do, KR;

Hyuk-joon Kwon, Gyeonggi-do, KR;

Jung-bae Lee, Gyeonggi-do, KR;

Youn-sik Park, Gyeonggi-do, KR;

Inventors:

Chul-Woo Park, Gyeonggi-do, KR;

Sung-Hoon Kim, Gyeonggi-do, KR;

Hyuk-Joon Kwon, Gyeonggi-do, KR;

Jung-Bae Lee, Gyeonggi-do, KR;

Youn-Sik Park, Gyeonggi-do, KR;

Assignee:

Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 5/06 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor memory device and an arrangement method thereof are included. The semiconductor memory device includes column selecting signal lines and global data IO signal lines arranged on the same layer in the same direction above a memory cell array; word lines and first local data IO signal lines arranged on a different layer from the column selecting signal lines above the memory cell array, in a perpendicular direction to the column selecting signal lines; and second local data IO signal lines arranged on a different layer from the column selecting signal lines and the word lines above the memory cell array, in the same direction as the first local data IO signal lines.


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