The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 24, 2008

Filed:

Oct. 19, 2004
Applicants:

Torkel Arnborg, Stockholm, SE;

Ulf Smith, Huddinge, SE;

Inventors:

Torkel Arnborg, Stockholm, SE;

Ulf Smith, Huddinge, SE;

Assignee:

Infineon Technologies AG, Neubiberg, DE;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/76 (2006.01);
U.S. Cl.
CPC ...
Abstract

An integrated LDMOS transistor comprises a semiconductor substrate (), an LDMOS gate region (), LDMOS source () and drain () regions, and a channel region () arranged beneath the LDMOS gate region, where the channel region interconnects the LDMOS source and drain regions. The LDMOS gate region comprises first () and second () gate insulation layer regions, a centrally located gate-dividing insulation region () provided between the first and second gate insulation layer regions, and first () and second () individual gate conducting layer regions, each being provided on top of a respective one of the first and second gate insulation layer regions, and each being an etched outside spacer region at the centrally located insulation layer region.


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