The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 17, 2008
Filed:
Apr. 14, 2006
Hsin-ley Suzanne Chen, San Jose, CA (US);
Patrick T. Chuang, Cupertino, CA (US);
Michelle Huang, San Jose, CA (US);
Hsin-Ley Suzanne Chen, San Jose, CA (US);
Patrick T. Chuang, Cupertino, CA (US);
Michelle Huang, San Jose, CA (US);
Sony Corporation, Tokyo, JP;
Sony Corporation, Inc., Park Ridge, NJ (US);
Abstract
A chain of boundary scan registers is configured to use a two-phase clock signal to avoid data timing race conditions. The two-phase clock signal is generated according to a two-phase clock generator, which includes two self-timed clock pulse generators for each boundary scan register. The two-phase clock generator locally generates a self-timed clock pulse at the rising edge of a clock signal, which triggers a first stage of the boundary scan register. The two-phase clock generator also generates a self-timed clock pulse at the falling edge of the input clock signal, which triggers a second stage of the boundary scan register. The two-phase clock controlled boundary scan register includes two latches, each latch is triggered by one of the self-timed clock pulse generated locally from the rising and falling edge of the input clock signal.