The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 17, 2008
Filed:
Jul. 12, 2004
John M Fike, Austin, TX (US);
William J. Wen, Austin, TX (US);
Patricia E Hareski, Austin, TX (US);
Sudhakar V. Allada, Austin, TX (US);
John M Fike, Austin, TX (US);
William J. Wen, Austin, TX (US);
Patricia E Hareski, Austin, TX (US);
Sudhakar V. Allada, Austin, TX (US);
QLogic, Corporation, Aliso Viejo, CA (US);
Abstract
A method for performing a fibre channel arbitrated loop integrity test using a fibre channel switch element is provided. The method includes, sending a fibre channel frame through the arbitrated loop; receiving the fibre channel frame after it has traversed through the arbitrated loop; performing a data compare between the fibre channel frame that was sent and the fibre channel frame that is received; detecting internal errors, if any, in the traversed fibre channel loop; and isolating a module that may have generated the error. The switch element includes, a cascade port that is used to couple one fibre channel switch element to another in a loop; and a port that sends a fibre channel frame through the loop and detects internal errors based on the comparison and a isolates a module that may have generated the internal error.