The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 17, 2008
Filed:
Nov. 10, 2005
Satoru Kodaira, Chino, JP;
Noboru Itomi, Nirasaki, JP;
Shuji Kawaguchi, Suwa, JP;
Takashi Kumagai, Chino, JP;
Junichi Karasawa, Tatsuno-machi, JP;
Satoru Ito, Suwa, JP;
Satoru Kodaira, Chino, JP;
Noboru Itomi, Nirasaki, JP;
Shuji Kawaguchi, Suwa, JP;
Takashi Kumagai, Chino, JP;
Junichi Karasawa, Tatsuno-machi, JP;
Satoru Ito, Suwa, JP;
Seiko Epson Corporation, Tokyo, JP;
Abstract
An integrated circuit device includes: a RAM block including a plurality of wordlines, a plurality of bitlines, a plurality of memory cells, and a wordline control circuit; and a data line driver block which drives a plurality of data line groups of a display panel based on data supplied from the RAM block. The data line driver block includes first to Nth (N is an integer larger than one) divided data line driver blocks, each of the first to Nth divided data line driver blocks driving a different data line group of the data line groups. The wordline control circuit drives an identical wordline N times from among the wordlines in one horizontal scan period of the display panel. The first to Nth divided data line drivers are disposed along a first direction in which the bitlines extend.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile