The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 17, 2008
Filed:
Sep. 16, 2003
Applicants:
Rajesh Tiwari, Plano, TX (US);
Russell Fields, Richardson, TX (US);
Scott A. Boddicker, Plano, TX (US);
Andrew Tae Kim, Plano, TX (US);
Inventors:
Rajesh Tiwari, Plano, TX (US);
Russell Fields, Richardson, TX (US);
Scott A. Boddicker, Plano, TX (US);
Andrew Tae Kim, Plano, TX (US);
Assignee:
Texas Instruments Incorporated, Dallas, TX (US);
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/4763 (2006.01);
U.S. Cl.
CPC ...
Abstract
A trench is formed in a low K dielectric () over a plurality of vias () also formed in the low K dielectric layer (). The vias are separated by a distance of less than Xand the edge of the trench is greater than Xfrom the edge α of the via closest to the edge of the trench. The trench and vias are subsequently filled with copper (), () to form the interconnect line.