The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 17, 2008
Filed:
Jul. 08, 2005
Christopher P. Mccarroll, Andover, MA (US);
Jerome H. Pozgay, Marblehead, MA (US);
Steven M. Lardizabal, Westford, MA (US);
Thomas E. Kazior, Sudbury, MA (US);
Michael G. Adlerstein, Wellesley, MA (US);
Christopher P. McCarroll, Andover, MA (US);
Jerome H. Pozgay, Marblehead, MA (US);
Steven M. Lardizabal, Westford, MA (US);
Thomas E. Kazior, Sudbury, MA (US);
Michael G. Adlerstein, Wellesley, MA (US);
Raytheon Company, Waltham, MA (US);
Abstract
A method includes providing a single crystal wafer having MMIC chips. Each chip has an active device in a first surface portion of a semiconductor substrate provided by the wafer and an electrical interconnect having a first portion disposed on a second surface of the semiconductor substrate. The semiconductor substrate structure has a via therethrough, a second portion of the electrical interconnect passing though the via and being electrically connected to the active device. A multilayer interconnect structure is formed on the wafer providing a signal routing section on the second surface portion of a corresponding one of the chips. Each section has dielectric layers and an electrical conductor, such electrical conductor being electrically coupled to the active device to route an electrical signal to such active device. Each chip and the corresponding signal routing section are separated from the wafer.