The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 10, 2008
Filed:
Jul. 24, 2002
Ki-seon Cho, Seoul, KR;
Ki-seon Cho, Seoul, KR;
Samsung Electronics Co., Ltd., Suwon, KR;
Abstract
A conditional select adder having a carry generating unit which generates a carry of two n-bit input data units X-X, and Y-Y, and a sum generating unit which generates the sum of the input data, is provided. The carry generating unit comprises a first input unit which receives predetermined data based on the input data Xand Y; a second input unit which receives the initial carry; and a selection unit which receives the result of performing an XOR operation on the input data Xand Y, in which according to the XOR result, either predetermined data based on the input data Xand Yinput to the first input unit, or the initial carry input to the second input unit is selected and output as a carry. The sum generating unit calculates a sum using the carry generated by the carry generating unit. Advantages include reducing power consumption, chip area, logic count, and delay time.
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