The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 10, 2008

Filed:

Jun. 28, 2006
Applicant:

Stuart D. Downes, Milford, MA (US);

Inventor:

Stuart D. Downes, Milford, MA (US);

Assignee:

EMC Corporation, Hopkinton, MA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01F 5/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A printed circuit board having interstitial vias. The printed circuit board has a plurality of overlying electrical conductors disposed within an inner region of the printed circuit board. The overlying electrical conductors are separated by dielectric material. The printed circuit board has an aperture passing through a portion of the plurality of overlying electrical conductors printed circuit board. The overlying electrical conductors have ends with recesses therein. An electrical conductive via passes through the aperture with distal portions of the via projecting into the recesses.


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Downes, Stuart. (2008). Multi-level printed circuit board interstitial vias (U.S. Patent No. 7385472). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7385472

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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