Computer architecture containing processor and decoupled coprocessor

Abstract

A computer system comprises a first processorand a second processorfor use as a coprocessor to the first processor. The system has a main memory. The system also has a decoupling elementsuch that instructions are passed to the second processorfrom the first processorthrough the decoupling element. This has the effects that the second processorconsumes instructions derived from the first processorthrough the decoupling element, and that the second processorreceives data from and writes data to the memory. The processing of instructions by the second processorcan thus be decoupled from the operation of the first processor This is particularly effective for processing of a computationally intensive task (such as a media computation) on an architecture with a general purpose first processor, using a second processoradapted for the computationally intensive task. This can effectively be combined with use of a buffer memoryadapted to exchange data particularly rapidly with the memoryin response to memory instructions, together with a further decoupling elementto decouple the buffer memoryfrom the first processor