The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 03, 2008

Filed:

Mar. 03, 2004
Applicants:

Ram Chilukuri, San Jose, CA (US);

Lawrence A. Prather, Boulder Creek, CA (US);

Ramakrishna R. Venuthurupalli, Santa Clara, CA (US);

Inventors:

Ram Chilukuri, San Jose, CA (US);

Lawrence A. Prather, Boulder Creek, CA (US);

Ramakrishna R. Venuthurupalli, Santa Clara, CA (US);

Assignee:

Genesis Microchip Inc., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G09G 5/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

An apparatus and method for processing Hsync and Vsync signals in graphic controllers to avoid a false reading of pulses caused by glitches. The apparatus and method involve detecting when the synch signal crosses the threshold for the first time. When this occurs, the output of the detection circuit is held for the predetermined period of time, even if subsequent transitions across threshold occur during this period. After the predetermined period expires, the output is released and may assume the same state as the input sync signal at that time. In this manner, a misinterpretation of the resolution format caused by the reading of a 'false' pulse caused by a glitch on a sync signal can be avoided.


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