The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 03, 2008

Filed:

Nov. 29, 2006
Applicants:

Kartik Nanda, Austin, TX (US);

John L. Melanson, Austin, TX (US);

Timothy Thomas Rueger, Austin, TX (US);

Inventors:

Kartik Nanda, Austin, TX (US);

John L. Melanson, Austin, TX (US);

Timothy Thomas Rueger, Austin, TX (US);

Assignee:

Cirrus Logic, Inc., Austin, TX (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03M 3/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A system-on-chip (SoC) integrated circuit including an interleaved delta-sigma analog to digital converter (ADC) provides for reduced noise in the ADC conversions. The ADC is operated intermittently and the balance of the digital circuits forming the system are halted while the conversions take place. The halted portion of the system may include an output low-pass filter of the ADC. The system may include a processor core or other logic having a clock frequency unrelated to the ADC modulator clock frequency that is not otherwise clock-managed to reduce noise induced in the converter output by the operation of the core or other logic.


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