The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 03, 2008

Filed:

Jun. 06, 2006
Applicant:

Terry J. Groom, Dallas, TX (US);

Inventor:

Terry J. Groom, Dallas, TX (US);

Assignee:

Intersil Americas Inc., Milpitas, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G05F 1/40 (2006.01); G05F 1/56 (2006.01); H02H 7/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

To prevent a voltage glitch in the regulated DC output voltage of a PWM/PFM DC-DC converter when switching between PFM and PMW modes, the error amplifier of the converter's PWM regulation path is provided with a DC voltage offset correction mechanism. This mechanism 'zeros-out' DC voltage offsets that may be present in the voltage regulation path, thereby enabling the error amplifier to accurately regulate the converter's output voltage. When the converter transitions between PFM and PWM modes, the DC offset correction mechanism establishes initial conditions of the error amplifier that effectively ensure that the converter's regulated output voltage at the beginning of a new 'switched-to' PWM mode cycle is DC offset-free.


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