The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 03, 2008
Filed:
Jun. 12, 2006
Jae-seon Yu, Kyoungki-do, KR;
Jae-Seon Yu, Kyoungki-do, KR;
Hynix Semiconductor, Inc., Kyoungki-do, KR;
Abstract
A method for fabricating a semiconductor device includes: forming a first polysilicon layer of a first conductive type over a substrate divided into a cell region and a peripheral region, the first polysilicon layer covering the peripheral region and opening predetermined recess portions of the cell region; etching the predetermined recess portions using the first polysilicon layer as an etch mask to form recesses; forming a second polysilicon layer of a second conductive type over the substrate in the cell region and the first polysilicon layer remaining in the peripheral region after the recesses are formed; selectively removing the second polysilicon layer formed over the remaining first polysilicon layer in the peripheral region; planarizing the second polysilicon layer in the cell region; and patterning the second polysilicon layer in the cell region and the first polysilicon layer in the peripheral region to form gate patterns in a dual poly-recess structure.