The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 27, 2008

Filed:

Jul. 21, 2006
Applicants:

Dharma R. Konda, Aliso Viejo, CA (US);

Mohana S. Devarajan, Irvine, CA (US);

Sanak H. Ream, Long Beach, CA (US);

Inventors:

Dharma R. Konda, Aliso Viejo, CA (US);

Mohana S. Devarajan, Irvine, CA (US);

Sanak H. Ream, Long Beach, CA (US);

Assignee:

Qlogic, Corporation, Aliso Viejo, CA (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 19/00 (2006.01); G01R 31/26 (2006.01);
U.S. Cl.
CPC ...
Abstract

Method and system for testing application specific integrated circuit using a tester is provided. The method includes measuring output data timing values of the application specific integrated circuit with respect to a tester cycle in a first pass; measuring first strobe timing value and second strobe timing value with respect to the tester cycle in a second pass; and calculating data set-up timing values and data hold timing values with respect to the first strobe and the second strobe, using the output data timing values measured in the first pass and the first strobe timing value and second strobe timing value measured in the second pass. The tester includes an input vector generator that generates input data for the application specific integrated circuit that is coupled to a data processing unit that calculates data set-up timing values and data hold timing values.


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