The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 27, 2008

Filed:

Sep. 01, 2005
Applicants:

James E. Riekels, New Hope, MN (US);

Thomas B. Lucking, Maple Grove, MN (US);

Bradley J. Larsen, Mound, MN (US);

Gary R. Gardner, Golden Valley, MN (US);

Inventors:

James E. Riekels, New Hope, MN (US);

Thomas B. Lucking, Maple Grove, MN (US);

Bradley J. Larsen, Mound, MN (US);

Gary R. Gardner, Golden Valley, MN (US);

Assignee:

Honeywell International, Inc., Morristown, NJ (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/788 (2006.01);
U.S. Cl.
CPC ...
Abstract

An Electrically Erasable Programmable Read Only Memory (EEPROM) memory cell and a method of operation are disclosed for creating an EEPROM memory cell in a standard CMOS process. A single polysilicon layer is used in combination with lightly doped MOS capacitors. The lightly doped capacitors employed in the EEPROM memory cell can be asymmetrical in design. Asymmetrical capacitors reduce area. Further capacitance variation caused by inversion can also be reduced by using multiple control capacitors. In addition, the use of multiple tunneling capacitors provides the benefit of customized tunneling paths.


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