The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 20, 2008

Filed:

Sep. 23, 2005
Applicants:

Clarence K. Coffee, Pembroke Pines, FL (US);

Eytan Hartung, Boca Raton, FL (US);

Inventors:

Clarence K. Coffee, Pembroke Pines, FL (US);

Eytan Hartung, Boca Raton, FL (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 13/36 (2006.01); G06F 13/12 (2006.01); G06F 13/40 (2006.01);
U.S. Cl.
CPC ...
Abstract

A system-on-chip () includes a 16-bit DSP (), a 16-bit data bus () coupled to the DSP, at least one 32-bit-only peripheral (), a 32-bit data bus () coupled to the peripheral, and a bridge (), including a write merge system (), coupled between the 16-bit and 32-bit buses. A method of the write merge system includes pre-storing addresses of peripherals in a memory map structure (and), receiving 16-bit data and a write transaction from the DSP for modifying sixteen bits of a 32-bit data location of the peripheral; reading 32-bit contents of the data location of the peripheral; multiplexing the received 16-bit data with the read 32-bit contents; and writing a new 32-bit word, including the modified sixteen bits and an unmodified sixteen bits, to the data location of the peripheral, without any intervention from the DSP subsequent to receiving the write transaction.


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