The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 20, 2008
Filed:
Jan. 27, 2004
Daniel W. J. Johnson, Round Rock, TX (US);
Albert J. Loper, Austin, TX (US);
Daniel W. J. Johnson, Round Rock, TX (US);
Albert J. Loper, Austin, TX (US);
VIA Technologies, Inc., , TW;
Abstract
An apparatus for performing an MultiMedia extension (MMX) Packed Sum of Absolute Differences (PSADBW) instruction is disclosed. The apparatus includes carry-generating subtraction logic that generates packed differences of the subtrahend from the minuend and associated carry bits indicating whether the difference is positive or negative. The apparatus selectively inverts the differences based on the carry bits. Addition logic adds the selectively inverted differences and carry bits substantially in parallel to generate the PSADBW instruction result. In one embodiment, the apparatus also includes two muxes. The first mux selects the selectively inverted differences in the case of a PSADBW instruction and selects a multiply instruction's partial products otherwise. The second mux selects the carry bits in the case of a PSADBW instruction and selects a second multiply instruction's partial products otherwise. The two mux outputs are provided to the addition logic. In one embodiment, the microprocessor translates the PSADBW instruction into at least first and second microinstructions for execution.