The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 20, 2008
Filed:
Dec. 13, 2005
Peter H. Sorrells, Gilbert, AZ (US);
David L. Wilkie, Gilbert, AZ (US);
Christopher A. Parris, Casa Grande, AZ (US);
Martin S. Kvasnicka, Gilbert, AZ (US);
Martin R. Bowman, Chandler, AZ (US);
Peter H. Sorrells, Gilbert, AZ (US);
David L. Wilkie, Gilbert, AZ (US);
Christopher A. Parris, Casa Grande, AZ (US);
Martin S. Kvasnicka, Gilbert, AZ (US);
Martin R. Bowman, Chandler, AZ (US);
Microchip Technology Incorporated, Chandler, AZ (US);
Abstract
An integrated circuit digital device is coupled to a memory with a single-node data, address and control bus. The memory may be a non-volatile memory and/or volatile memory. The memory may be packaged in a low pin count integrated circuit package. The memory integrated circuit package may have a ground terminal, V; a power terminal, Vor V; and a bidirectional serial input-output (I/O) terminal, SCIO. Memory block address set-up may be performed via software instructions through the SCIO terminal. In addition, hardwired memory block address selection terminals Aand Amay be used when more then three terminals are available on the memory integrated circuit package. The memory may have active pull-up and pull-down drivers coupled to the single-node data, address and control bus.