The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 20, 2008

Filed:

Jun. 21, 2006
Applicants:

Vlad Novotny, Los Gatos, CA (US);

Bharat Sastri, Pleasanton, CA (US);

Chitranjan N. Reddy, Los Altos Hills, CA (US);

Inventors:

Vlad Novotny, Los Gatos, CA (US);

Bharat Sastri, Pleasanton, CA (US);

Chitranjan N. Reddy, Los Altos Hills, CA (US);

Assignee:

Active Optical MEMS Inc., Fremont, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G02B 26/00 (2006.01); H01L 21/00 (2006.01); H01L 29/84 (2006.01); C23F 1/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

Described are MEMS mirror arrays monolithically integrated with CMOS control electronics. The MEMS arrays include polysilicon or polysilicon-germanium components that are mechanically superior to metals used in other MEMS applications, but that require process temperatures not compatible with conventional CMOS technologies. CMOS circuits used with the polysilicon or polysilicon-germanium MEMS structures use interconnect materials that can withstand the high temperatures used during MEMS fabrication. These interconnect materials include doped polysilicon, polycides, and tungsten metal.


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