The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 13, 2008

Filed:

Feb. 09, 2005
Applicant:

Woo-seok Kang, Seoul, KR;

Inventor:

Woo-seok Kang, Seoul, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method and apparatus of interleaving memory banks in a multi-layer bus system. The apparatus includes a plurality of slave interface units receiving signals requesting a bus access and generating control signals, and a controller receiving the control signals generated from the plurality of slave interface units and generating signals required to access the memory banks. Accordingly, it is possible to greatly reduce a delay time caused when accessing a synchronous dynamic random access memory (SDRAM), for example, in a multi-layer bus system.


Find Patent Forward Citations

Loading…