The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 13, 2008
Filed:
Mar. 15, 2005
Franck Seigneret, Roquefort les pins, FR;
Nabil Khalifa, Saint Laurent du Var, FR;
Sivayya Ayinala, Plano, TX (US);
Praveen Kolli, Dallas, TX (US);
Franck Seigneret, Roquefort les pins, FR;
Nabil Khalifa, Saint Laurent du Var, FR;
Sivayya Ayinala, Plano, TX (US);
Praveen Kolli, Dallas, TX (US);
Texas Instruments Incorporated, Dallas, TX (US);
Abstract
A direct memory access (DMA) circuit () includes a read port () and a write port (). The DMA circuit () is a multithreaded initiator with 'm' threads on the read port () and 'n' threads on the write port (). The DMA circuit () includes a data FIFO () which is shared by all of the logical channels and the FIFO depth can be allocated dynamically allowing for the maximum number of channels to be scheduled and concurrently active. The FIFO () can also be allocated to a single channel if there is only one logical channel active. The FIFO () increases the DMA's transfer performance, pre-fetch capacity and buffering, while maximizing pipelining.