The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 13, 2008

Filed:

Oct. 12, 2006
Applicants:

Edward T. Spears, Gilbert, AZ (US);

Douglas A. Teeter, Arlington, MA (US);

Hien D. Bui, Lowell, MA (US);

Inventors:

Edward T. Spears, Gilbert, AZ (US);

Douglas A. Teeter, Arlington, MA (US);

Hien D. Bui, Lowell, MA (US);

Assignee:

RF Micro Devices, Inc., Greensboro, NC (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03F 1/14 (2006.01);
U.S. Cl.
CPC ...
Abstract

The present invention is a parallel RF amplifier circuit that selects between a high power side (HPS) and a low power side (LPS), depending upon output power. A chain matching network couples an LPS output to an HPS output for improved efficiency at lower output power. When the HPS is selected, the LPS output is disabled, and when the LPS is selected, the HPS output is disabled When the HPS is selected, large signal voltage swings from the collector of the HPS amplifier may be multiplied through the chain matching network, and may cause negative voltage swings at the LPS collector, which may degrade linearity and efficiency of the HPS amplifier by driving currents into the disabled LPS amplifier. Therefore, the present invention includes LPS bias circuitry to minimize impacts of negative voltage swings at the LPS output.


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