The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 06, 2008

Filed:

Jun. 15, 2005
Applicants:

Gabriel M. LI, San Francisco, CA (US);

Greg J. Richmond, Sunnyvale, CA (US);

Inventors:

Gabriel M. Li, San Francisco, CA (US);

Greg J. Richmond, Sunnyvale, CA (US);

Assignee:

Cypress Semiconductor Corp., San Jose, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03L 7/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

Circuits and methods are provided herein for monitoring the integrity of a power supply, the circuits and methods providing additional resources/information for diagnosing a cause behind a reset signal, and in some cases, a reason behind a power failure. A first method described herein provides exemplary steps for monitoring a level of a power supply voltage supplied to one or more system components. A second method describes exemplary steps for monitoring an electrical connection between the power supply (or ground supply) and one or more supply pins. Each of the methods involves monitoring a state of one or more bits stored, e.g., within a status register. The methods may be used separately, or in conjunction with one another, for detecting the occurrence of a power abnormality.


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