The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 06, 2008
Filed:
Sep. 15, 2005
Tatsuji Nagaoka, Nagano, JP;
Tatsuji Nagaoka, Nagano, JP;
Abstract
The semiconductor apparatus is disclosed that includes a partial SOI substrate including an oxide film; a lateral first MOSFET section having a planar gate structure and formed in the portion of the partial SOI substrate where there is an oxide film; a vertical second MOSFET section having a trench gate structure and formed in the portion of the partial SOI substrate where there is no oxide film, the second MOSFET section being adjacent to the first MOSFET section. The first MOSFET section includes a first p-type base region on the oxide film. The second MOSFET section includes a second n-type drain region, a second n-type drift region on the second n-type drain region, and a second p-type base region in the surface portion of the second n-type drift region. The height Hof the pn-junction between the second n-type drift region and the second p-type base region from the second n-type drain region is set to be lower than the height Hof the boundary between the oxide film and the first p-type base region from the second n-type drain region to make the oxide film serve as a field plate. The semiconductor apparatus including a vertical device and a lateral device configured as described above facilitates doping the second n-type drift region heavily while securing a certain breakdown voltage, reducing the ON-resistance of the second MOSFET section, and reducing the semiconductor chip size.