The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 29, 2008
Filed:
Dec. 09, 2004
William V. Huott, Holmes, NY (US);
David J. Lund, Staatsburg, NY (US);
Kenneth H. Marz, Poughkeepsie, NY (US);
Bryan L. Mechtly, Red Hook, NY (US);
Pradip Patel, Poughkeepsie, NY (US);
William V. Huott, Holmes, NY (US);
David J. Lund, Staatsburg, NY (US);
Kenneth H. Marz, Poughkeepsie, NY (US);
Bryan L. Mechtly, Red Hook, NY (US);
Pradip Patel, Poughkeepsie, NY (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A computing system is provided which includes a processor having a cache memory. The cache memory includes a plurality of independently configurable subdivisions, each subdivision including a memory array. A service element (SE) of the computing system is operable to cause a built-in-self-test (BIST) to be executed to test the cache memory, the BIST being operable to determine whether any of the subdivisions is defective. When it is determined that one of the subdivisions of the cache memory determined defective by the BIST is non-repairable, the SE logically deletes the defective subdivision from the system configuration, and the SE is operable to permit the processor to operate without the logically deleted subdivision. The SE is further operable to determine that the processor is defective when a number of the defective subdivisions exceeds a threshold.