The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 29, 2008
Filed:
Jun. 24, 2004
Chein-i Chang, Ellicott City, MD (US);
Jianwei Wang, San Jose, CA (US);
Chein-I Chang, Ellicott City, MD (US);
Jianwei Wang, San Jose, CA (US);
University of Maryland, Baltimore County, Baltimore, MD (US);
Abstract
A Field Programmable Gate Arrays (FPGA) design uses a Coordinate Rotation DIgital Computer (CORDIC) algorithm that can convert a Givens rotation of a vector to a set of shift-add operations. The CORDIC algorithm can be easily implemented in hardware architecture, therefore in FPGA. Since the computation of the inverse of the data correlation matrix involves a series of Givens rotations, the utility of the CORDIC algorithm allows a causal Constrained Energy Minimization (CEM) to perform real-time processing in FPGA. An FPGA implementation of the causal CEM is described and its detailed architecture is also described.