The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

System and method for providing clocks to digital circuitry with a need for multiple clocks. A preferred embodiment comprises an oscillator controller (oscillator clock domain block) distributes a system clock generated by an oscillator to a plurality of clock domain blocks (GSM clock domain blockand so forth). The clock domain blocks use the system clock to generate specific clocks needed by attached hardware. The clock domain blocks may be programmed after manufacture to permit customized clock generation to meet requirements.

Find Patent Forward Citations

Leclercq, Maxime. (2008). System-on-a-chip (soc) clock management—a scalable clock distribution approach (U.S. Patent No. 7362188). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7362188

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

Patent No.:

US 7362188 B1

Date of Patent:

Apr. 22, 2008

Jun. 04, 2003

System-on-a-chip (soc) clock management&#x2014;a scalable clock distribution approach

Abstract

System-on-a-chip (soc) clock management—a scalable clock distribution approach