The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 22, 2008

Filed:

Jul. 30, 2004
Applicants:

Yoichi Yamamoto, Fukuoka, JP;

Masashiro Tanaka, Fukuoka, JP;

Shigekazu Nakamura, Fukuoka, JP;

Hiroshi Suetake, Fukuoka, JP;

Inventors:

Yoichi Yamamoto, Fukuoka, JP;

Masashiro Tanaka, Fukuoka, JP;

Shigekazu Nakamura, Fukuoka, JP;

Hiroshi Suetake, Fukuoka, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G05B 11/28 (2006.01);
U.S. Cl.
CPC ...
Abstract

A simple and accurate dead time dispersion measurement method and a voltage source inverter control method that can prevent the occurrence of an unstable phenomenon are provided. The control method controls a voltage source inverter of a PWM system, which includes a power semiconductor device controlling a level of a voltage, a frequency and a phase. According to the control method, before operation, voltage error information for each polarity of respective phase currents of the inverter is stored. And during the operation, the voltage error information is read to compensate for a voltage instruction value or a pulse width of a PWM instruction signal, so that a voltage error can be corrected.


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