The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 15, 2008
Filed:
Nov. 22, 2005
Amar Pal Singh Rana, Sunnyvale, CA (US);
Nirmal Singh, Sunnyvale, CA (US);
Amar Pal Singh Rana, Sunnyvale, CA (US);
Nirmal Singh, Sunnyvale, CA (US);
Other;
Abstract
The present invention pertains to automated technology dependent transformations for CMOS digital design synthesis resulting in a combination of CMOS interconnected standard-cells from a target CMOS library being mapped and transistor-level representation of the input design specification. The transistor level type and portion to be represented at the transistor level representation is chosen by a user. The transistor sizing and evaluating the combination of said transistor-level representation and standard-cell mapping are performed iteratively to meet delay, size and power constraints for CMOS.