The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 15, 2008
Filed:
Jun. 28, 2006
Arijit Dutta, West Bengal, IN;
Bhuwan K Agrawal, Noida, IN;
Atul Dogra, New Delhi, IN;
Freescale Semiconductor, Inc., Austin, TX (US);
Abstract
A method and a system for reducing delay noise in an integrated circuit (IC) includes generating delay information for each net, and each device of the IC. Each net has a ground capacitance, a coupling capacitance, and a resistance. An effective capacitance is computed for each net. The effective capacitance is divided by sum of the ground capacitance and the coupling capacitance to compute a scale factor. The effective capacitance is then scaled by the scale factor to determine a delay noise induced load. Finally, the timing paths are optimized incrementally by using the delay noise induced load, the resistance, and the delay information.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile