The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 15, 2008
Filed:
Sep. 11, 2006
Junko Okawara, Kawasaki, JP;
Mitsuharu Sakakibara, Kawasaki, JP;
Naoto Emi, Kawasaki, JP;
Tomoharu Sohma, Kawasaki, JP;
Junko Okawara, Kawasaki, JP;
Mitsuharu Sakakibara, Kawasaki, JP;
Naoto Emi, Kawasaki, JP;
Tomoharu Sohma, Kawasaki, JP;
Fujitsu Limited, Kawasaki, JP;
Abstract
A non-volatile semiconductor memory device includes a memory cell array and an operation control circuit. The memory cell array includes a plurality of non-volatile memory cells that are electrically rewritable. The operation control circuit controls an operation of the memory cell array in accordance with an external instruction. The operation control circuit includes a flag circuit and an erase prohibition circuit. The flag circuit is set when erase incompletion is detected from any of the memory cells by an erase verify operation of the memory cell array. The erase prohibition circuit prohibits an erase operation to the memory cell array irrespective of the external instruction when the flag circuit is in a reset state.