The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 15, 2008
Filed:
Feb. 28, 2006
Joseph O. Marsh, Poughkeepsie, NY (US);
Joseph Natonio, Wappingers Falls, NY (US);
James M. Wilson, Poughkeepsie, NY (US);
Joseph O. Marsh, Poughkeepsie, NY (US);
Joseph Natonio, Wappingers Falls, NY (US);
James M. Wilson, Poughkeepsie, NY (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A dual purpose current mode logic ('CML') latch circuit is provided which includes a CML latch operable to receive at least a pair of differential input data signals and at least one clock signal. The CML latch is operable to generate at least one output signal in accordance with the states of the pair of input differential data signals. A mode control device is operable to receive a mode control signal to operate the CML latch as a buffer or as a latch. In such way, when the mode control signal is inactive, the CML latch generates and latches the output signal at a timing determined by the at least one clock signal, and when the mode control signal is active the CML latch generates the output signal such that the output signal changes whenever the states of the pair of differential input data signals change.