The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 15, 2008
Filed:
Feb. 09, 2006
Karapet Khanoyan, Lake Forest, CA (US);
Mark Chambers, Laguna Hills, CA (US);
Karapet Khanoyan, Lake Forest, CA (US);
Mark Chambers, Laguna Hills, CA (US);
Broadcom Corporation, Irvine, CA (US);
Abstract
The present invention relates to frequency dividers. The frequency divider comprises an input, a counter, a first comparator, an interconnect, and an output. The counter has a counter reset port and is configured to receive a clock signal from the input and to produce a sum signal. The first comparator is configured to receive the sum signal, to compare the sum signal to a first integer, and to produce a first comparison signal. The interconnect is configured to convey the first comparison signal from the first comparator to the counter reset port. The output coupled to the first comparator. The clock signal has a periodic waveform. The sum signal represents a first sum, which equals a number of waveforms of the clock signal received by the counter after the counter has been reset. In a first embodiment, the first integer is selectable from a set of at least three consecutive integers. In a second embodiment, a frequency of the clock signal is at least 1.5 gigahertz. A third embodiment includes the features of both the first embodiment and the second embodiment.