The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 7356717 B1

PDF
Full Text
Expired
Date of Patent:
Apr. 08, 2008

Filed:

Sep. 05, 2006
Applicants:

Shinji Shiraga, Kanagawa, JP;

Oki Minabe, Tokyo, JP;

Inventors:

Shinji Shiraga, Kanagawa, JP;

Oki Minabe, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/00 (2006.01); G06F 1/32 (2006.01); G11C 5/14 (2006.01);
U.S. Cl.
CPC ...
Abstract

A power saving type information processing apparatus is provided which is not expensive and can provide a high interruption performance without using an expensive and dedicated memory and a complicated software process. After an SDRAM setting register of an SDRAM controller outputs a SELF allowance signal for allowing SDRAM to transfer to a power saving mode from a normal operation mode, a WAITI command fetch detecting circuit outputs a WAITI command detecting signal. In this case, SDRAM is made to transfer to the power saving mode. If a CPU detects an external interruption while SDRAM is in the power saving mode, SDRAM is returned to the normal operation mode irrespective of settings of the SDRAM setting register.


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Shiraga, Shinji. (2008). Information processing apparatus with central processing unit and main memory having power saving mode, and power saving controlling method (U.S. Patent No. 7356717). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7356717

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