The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 08, 2008
Filed:
Oct. 18, 2004
Hirofumi Sakane, Newark, DE (US);
Levent Yakay, Elkton, MD (US);
Vishal Karna, Newark, DE (US);
Clement Leung, Reston, VA (US);
Guang R. Gao, Newark, DE (US);
Hirofumi Sakane, Newark, DE (US);
Levent Yakay, Elkton, MD (US);
Vishal Karna, Newark, DE (US);
Clement Leung, Reston, VA (US);
Guang R. Gao, Newark, DE (US);
UD Technology Corporation, Newark, DE (US);
Abstract
A method for emulating a logic circuit having at least one set of identical logic modules is disclosed. Each logic module in a set has logic elements and memory elements that store a module state of that logic module. The logic circuit is emulated by extracting a logic module from a set of identical logic modules, translating the extracted logic module for iterative representation of the module state of each of the logic modules with a single instance of the logic elements, and configuring a logic device with the translated logic module to emulate the logic circuit.