The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 08, 2008
Filed:
Dec. 05, 2006
Wei Daisy Cai, Fremont, CA (US);
Swaroop Kaza, Sunnyvale, CA (US);
Colin S. Bill, Cupertino, CA (US);
Michael Vanbuskirk, Saratoga, CA (US);
Wei Daisy Cai, Fremont, CA (US);
Swaroop Kaza, Sunnyvale, CA (US);
Colin S. Bill, Cupertino, CA (US);
Michael VanBuskirk, Saratoga, CA (US);
Spansion LLC, Sunnyvale, CA (US);
Abstract
The present approach is a method of writing (which may be programming or erasing) data to a selected memory cell of a memory array. The array includes a plurality of word lines, a plurality of bit lines, a plurality of memory cells each including a diode and a resistive memory device in series connecting a word line and a bit line, and a plurality of transistors, each having a first and second source/drain terminals and a gate, each transistor having a first source/drain terminal connected to a bit line. In the present method a voltage is applied to a selected word line, and a voltage is applied to the second source/drain terminal of a transistor having its first source/drain terminal connected to a selected bit line. The voltage applied to the selected word line is greater than the voltage applied to the second source/drain terminal of that transistor.