The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 7353599 B1

PDF
Full Text
Expired
Date of Patent:
Apr. 08, 2008

Filed:

May. 01, 2007
Applicants:

Edmond Warming Lau, Sunnyvale, CA (US);

Xiaozhong Wang, Sunnyvale, CA (US);

Robert Lewis Mosebar, San Jose, CA (US);

Inventors:

Edmond Warming Lau, Sunnyvale, CA (US);

Xiaozhong Wang, Sunnyvale, CA (US);

Robert Lewis Mosebar, San Jose, CA (US);

Assignee:

Emcore Corporation, Albuquerque, NM (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H05K 3/02 (2006.01); H05K 3/30 (2006.01); B02D 5/06 (2006.01);
U.S. Cl.
CPC ...
Abstract

Methods for qualifying the accuracy of a circuit board may include providing a printing mask pattern for first and second sides of the circuit board with a first sequence of spaced indicia parallel to a first edge of the printed circuit board, and a second sequence of spaced indicia parallel to a second edge of the printed circuit board opposite the first edge. A layer of visually conspicuous material may be printed on the board using the mask patterns. The board may be separated or cut to a predetermined size thereby removing, at least a portion of the spaced indicia of each sequence. The number of indicia printed on the first and second sides respectively of the circuit board may be determined after the circuit board is cut to the predetermined size. The circuit board may be accepted or rejected based upon the numerical determination against a qualification criteria.


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Lau, Edmond. (2008). Fiducial markings for quality verification of high density circuit board connectors (U.S. Patent No. 7353599). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7353599

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