The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 01, 2008

Filed:

Apr. 27, 2004
Applicant:

Xin Liu, Santa Clara, CA (US);

Inventor:

Xin Liu, Santa Clara, CA (US);

Assignee:

National Semiconductor Corporation, Santa Clara, CA (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 1/04 (2006.01);
U.S. Cl.
CPC ...
Abstract

A circuit for data/clock deskewing includes a data delay circuit and a clock circuit. The data delay circuit is arranged to select a delay for the data signal responsive to a data delay signal. The clock circuit is arranged to provide an even clock signal and an odd clock signal, and to select one of them responsive to a clock select signal. Also, two delayed versions of the selected clock signal are provided. The data latching circuit is arranged to latch the delayed data signal with the selected clock and with the two delayed versions of the selected clock signal. Further, the latched data signals are employed to deskew the clock and data signals such that set-up and hold times are substantially optimized under jittery conditions.


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