The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 01, 2008
Filed:
Aug. 02, 2006
Applicant:
Hiroyoshi Tomita, Kawasaki, JP;
Inventor:
Hiroyoshi Tomita, Kawasaki, JP;
Assignee:
Fujitsu Limited, Kawasaki, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03H 11/26 (2006.01);
U.S. Cl.
CPC ...
Abstract
A delay circuit includes: an input signal line (IN) through which an input signal is inputted; a capacitor () charged with and discharging electric charge; a first switch () connected to the input signal line and operating according to the input signal when the capacitor is to be charged with electric charge; a second switch () connected to the input signal line and operating according to the input signal when the electric charge is to be discharged from the capacitor; and a comparison circuit () comparing a voltage of the capacitor and a reference voltage to output a delay signal of the input signal.